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Reply To: Why are the ultra low power MCUs all 32-bit? I assumed 8-bit would sip less

I went down this hole for a garden sensor last year and the answer turned out to be energy per job, not current.

A battery device spends 99.9% of its life asleep. What empties the battery is (sleep current × sleep time) + (active current × awake time) + the radio. The core width hardly matters for sleep current: that’s set by the process the chip is made on, the RTC, the RAM retention and leakage. Modern 32-bit low power parts are made on newer, leakier-in-theory but better-managed processes with power domains you can switch off, and their sleep currents with RTC running are around 1 µA or less. An ATmega328P in power-down with the watchdog running is in the same ballpark at best, and with brown-out detection on, worse.

When awake, a 32-bit core finishes the job faster. Reading a 16-bit ADC result, doing a few multiplications for RMS current and building a packet is many more instructions on an 8-bit AVR than on a Cortex-M0+, at similar µA/MHz. Fewer cycles means less time awake, so less energy, even if the current while running is similar.

And the peripherals: the low power ARM parts can run the ADC, DMA and timers while the core sleeps, so the core wakes once with the result ready.

In my case the MCU choice turned out to be noise next to the radio: one LoRa transmit costs more than an hour of MCU sleep. Spend your effort on how often you send.

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